ATE Integration
JTAG / boundary scan test systems often are used as stand-alone tools. However, a combination of boundary scan with in-circuit test,
functional test, flying probe test and even automated optical inspection systems may make sense as significantly higher fault coverage
may be achieved.
Extended Interconnect Test
Often, boundary scan alone cannot test all of a PCBA's circuitry completely. Usually, other test methodologies, such as MDA (Manufacturing Defect Analysis), AOI (Automatic Optical Inspection), ICT (In-Circuit Test), or FT (Functional Test), are used to complement boundary scan to achieve satisfactory test coverage. Executing all these tests in a separate step means board handling overhead that may be reduced by combining test methods.Boundary Scan can be highly advantageous when integrated into automated test equipment (ATE) based on a bed-of-nails (e.g. in-circuit testers) or moving probes (flying probe testers). A combined solution can either reduce the number of nails required in a bed-of-nail fixture (thus dramatically reduce adapter cost), or it can improve the test time by reducing the number probing points required for an interconnect test based on moving probes. SYSTEM CASCON includes software features like Virtual Scan Pin and HyScan that allow the automated generation of test programs that utilize boundary scan cells and tester channels together to achieve the best possible interconnect test coverage.
Combined Boundary Scan - Functional Test
Combining ad-hoc test, such as FT (functional test), with boundary scan has the advantage, that functional test sequences become much simpler, since they don’t have to detect and locate/diagnose structural faults. Boundary scan tests can be initiated at the beginning of the test sequence, verifying that there are no structural faults on the unit under test (UUT) in the circuitry testable via boundary scan resources. After successful execution of the boundary scan tests, functional tests can be run to exercise the UUT at speed. Boundary scan can be used to reconfigure certain parts of the circuitry, e.g. to aid functional test or to load the firmware. At the most integrated level, both boundary scan resources and functional test resources can be used in conjunction to improve testability and simplify test sequences.One way to tightly integrate boundary scan and functional test features is through processor emulation test (PET). GOEPEL electronic provides processor emulation test features through the VarioTAP technology.