Virtual Scan Pin
SYSTEM CASCON includes a software feature called "Virtual Scan Pin" which allows the automated generation of test programs
that utilize boundary scan cells and tester channels (such as flying probes or bed-of-nail probes) together to achieve the
best possible interconnect test coverage. Solutions combining JTAG / boundary scan and in-circuit test
can reduce the number of nails required in a bed-of-nail fixture (thus dramatically reduce adapter cost), and improve the test time
by reducing the number probing points required for an interconnect test based on moving probes (flying probe test).
Virtual Scan Pin enables a very powerful integration of boundary scan in 3rd party ATE.
We can classify three levels of JTAG / boundary scan "integrations":
Level 1: The 3rd party tester simply provides power during the boundary scan tests and any JTAG / boundary scan applications run as if they were executed on a stand-alone JTAG test station. There is no interaction between the 3rd party tester and the JTAG / boundary scan vectors during the boundary scan tests. CASCON’s Virtual Scan Pin technique is not in use.
Level 2: This level of integration adds some software interaction to the Level 1 integration in order to optimize out any tests that overlap in the two test techniques. However, again CASCON’s Virtual Scan Pin technique is not in use.
Level 3: This level adds the interactive use of the 3rd party tester's test channels (bed-of-nail probes or flying probes) in boundary scan tests to Level 2. This takes advantage of CASCON’s Virtual Scan Pin technique, which allows the tester probes to be used as additional boundary-scan cells that can be connected to any probe-accessible net in order to extend the test coverage and potentially further improve diagnostics.