Learn about GOEPEL Electronics JTAG / boundary scan solutions
JTAG / boundary scan tools by GOEPEL electronics
What is JTAG / boundary scan?
Overview of JTAG / boundary scan tools offered by GOEPEL
Questions to consider when selecting JTAG / boundary scan tools and services
What is JTAG / boundary scan ?
JTAG / boundary scan was the first test methodology to become an
IEEE standard. The standard number is IEEE 1149.1 and its initial
version was balloted on and approved in 1990. This
standard defines features to be designed into an integrated circuit that
provides access to its digital I/O pins from the inside of the device.
This allows circuit nodes on the PCB to be accessed with device internal
test features, rather than with a bed-of-nails fixture or with moving
probes. (GOEPEL offers a software tool explaining IEEE 1149.1 features
and their functions. It is available free of charge upon request.)
With these built-in test features, boundary scan
helps us to access circuit nodes that may not be
accessible when using external physical access methods with probes. This is especially important when considering the wide use of high-density device packages and components
with hidden solder joints (such as BGA, micro BGA, and so on). Boundary
scan also has the potential to shorten time-to-market since it can
be used very early in the product life cycle, potentially without the
need for any bed-of-nails fixture or flying probes.
Furthermore, boundary scan can be used throughout the whole product
life cycle, since test vectors can be applied with very simple test
equipment. Special circuitry to execute boundary scan tests can even be
embedded on a Printed Circuit Assembly for use at the system level, for
example as part of power-on self tests for systems out in the field.
Boundary scan tests can be developed very rapidly and early in the design cycle, typically as soon
as a schematic design of the UUT is available, even prior to having the
layout of the PCB finished.
The primary application, for which boundary scan was initially developed, was to detect and diagnose manufacturing defects related to
connectivity at the board level, such as stuck-at-0 and stuck-at-1
faults, open solder joints, and shorted circuit nodes. Today, the test
access port defined in IEEE 1149.1 is used for many additional
applications, such as in-system programming, access to built-in self
test, on-chip emulation and debug resources, and system level test.
JTAG stands for Joint Test Action Group, which was a group of
interested parties that set out to develop the test methodology that
became IEEE 1149.1. Since then, many standard development efforts built
on the original work by reusing features defined in 1149.1. One such
standard is IEEE 1149.4, which defines device features supporting the
test of analog circuits. Another example is IEEE 1149.6, which defines
test resources used to verify AC-coupled networks, improving testability of technologies such as differential networks. IEEE 1532 defines in-system programming
features accessible via the test access port defined in 1149.1,
essentially providing a common method to program devices from different
vendors. A number of additional standardization efforts related to JTAG /
boundary scan have recently been completed (e.g. IEEE 1149.7, IEEE 1500)
or are under way (e.g. IEEE P1149.8.1, IEEE P1581, IEEE P1687, SJTAG).
GOEPEL can provide Design for Testability guidelines and even offers DFT analysis for boundary scan free of charge.
We also offer a variety of seminars and training programs covering
boundary scan technology and GOEPEL boundary scan tools. Seminars
are offered as half day and full day events, training classes
last
from one day to four days, depending on the curriculum. Both seminars
and training classes can be customized to cover specific topics and can
be provided on-site for a corporate audience. We also offer web based
training through webinars and conference calls.
For a schedule of upcoming webinars, seminars, and training classes,
visit our events page.
Or contact us to request further information.
For details or to request a quote, please contact us.