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Market segments Aerospace Automotive Consumer Electronics Contract Manufacturers Industrial Controls Healthcare Electronics Defense Electronics Telecom, Networking Applications IC / device test JTAG validation and BSDL verification Chip-embedded instrumentation PCBA / sub assembly test Prototype verification Structural manufacturing test Automated optical inspection Automated X-ray inspection Conformal Coat Inspection Field service JTAG / boundary scan Processor emulation test In-system programming Serial EEPROM Flash EEPROM CPLD and FPGA System level test Functional test Brands ADYCS CASCON GALAXY CASCON POLARIS CASLAN Chameleon ChipVORX CION FastScale HyScan JULIET OptiCon SCANASSIST SCANBOOSTER SCANFLEX SCANVISION SYSTEM CASCON TAPChecker TOM VarioCORE VarioTAP Virtual Scan Pin Products Automated Optical Inspection systems Automated X-Ray Inspection systems Automotive Test Solutions Chip-embedded instrumentation tools EDA software In-system programming tools JTAG / boundary scan software CASCON GALAXY CASCON POLARIS SCANASSIST SCANVISION JTAG / boundary scan hardware CION PicoTAP SCANBOOSTER SCANFLEX Other JTAG accessories JTAG software and hardware bundle SCANBOOSTER Designer Studio ATE Integration packages JULIET Tester Processor Emulation Test tools General purpose test modules I/O modules Interface modules Power modules Simulation modules Switching modules Turn-key JTAG / boundary scan tester Support Contact Technical Support Contact Sales Support Services BSDL Verification DFT Analysis Technical Support Test Development Services Training GOEPEL GENESIS Event registration e-Bulletin signup Education DFT Guide (blog) GOEPEL Electronics' Blog Downloads DFT Guidelines BSDL SyntaxChecker Tutorials, webinar transcripts and recordings Product information Test technology and standards IEEE 1149.1 IEEE 1149.4 IEEE 1149.6 IEEE 1149.7 IEEE P1149.8.1 IEEE 1450.x IEEE 1500 IEEE 1532 IEEE 1581 IEEE P1687 IEEE P1838 JESD-71 / STAPL SVF In-Circuit Test Flying Probe Test JTAG / boundary scan Other technologies Glossary Upcoming events Webinars Trade shows Seminars Training News News releases Sign up for e-Bulletin Upcoming Events Corporate information About us Survey Contact us Partners Privacy Policy Sitemap

Processor Emulation Test

VarioTAP

One of the limitations of JTAG / boundary scan is that it is not suited for dynamic at-speed tests. This limitation can be overcome with processor controlled tests, also referred to as processor emulation test or JTAG emulation test.
VarioTAP is a software technology provided by GOEPEL Electronics that enables the fusion of JTAG / boundary scan and processor controlled tests, resulting in higher fault coverage than is achievable with pure boundary scan.

Learn more about the benefits of processor emulation test ...
Download a VarioTAP White Paper.

SYSTEM CASCON

The JTAG / boundary scan software environment SYSTEM CASCON provides powerful tools not only for boundary scan tests and in-system programming, but also for processor controlled tests, in one integrated software and hardware environment. A unique concept of language based debug, emulation, and test via JTAG and potentially other interface ports enables applications such as:

• Test of Digital I/O
• Test of Analog / Mixed-Signal I/O
• Fast external Flash Programming
• On-Chip Flash Programming
• Test of Bus Interfaces
• Test of Peripheral Circuitry
• Dynamic Memory Access Tests
• Customer specific Tests
• Unique: Interlaced utilization of emulation resources and Boundary Scan resources

Learn more about SYSTEM CASCON or contact us to arrange a demo.