Press
Release
Press
Release
FOR IMMEDIATE RELEASE
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| Boundary Scan Software Platform SYSTEM CASCON sports new Toos for the Test of Logic Clusters |
| Jena / Nuremberg, Germany - During the Embedded World trade show in Nuremberg, Germany, GÖPEL electronic, world-class
vendor of JTAG/Boundary
Scan solutions
compliant to IEEE Std. 1149.x, introduces a new generation of tools
within the frame of the Boundary Scan software platform SYSTEM CASCON™
to cover non-Boundary Scan circuit partitions. The new tools for the test of conventional logic components and complete clusters provide a hitherto unrivalled process automation and consistently support all involved IEEE1149.1 application stages – from the management of the entire database for all non-Boundary Scan components, Automatic Test Program Generation (ATPG), automatic Pin Failure Diagnostic (PFD), graphical fault localisation all the way to debugging in a completely integrated environment. “A safe and extensive fault coverage also in the field of non-Boundary Scan circuit partitions is one of the highest prioritised decision criteria in system purchase, and at the same time, a critical challenge for the system vendor’s capability”, says Thomas Wenzel, managing director of GOEPEL electronic’s Boundary Scan division. “The complete automation liberates users from time-consuming manual vector definitions. Additionally, it enables a deterministic fault coverage specification whilst providing highest safety of the scan operations. The enhanced IEEE 1149.x tools allow completely transparent process cycles and a clearly structured data flow. First an intelligent project data base incl. all non-Boundary Scan structures is generated from the CAD data and with the help of a graphical component library. Each non-Boundary Scan component is described in terms of logical terms as extended part of the respective component model. This way of characteristic description offers a universal approach and avoids the disadvantages of predefined test patterns. Based on this data the enhanced ATPG for 1149.1/1149.6 interconnections generates a commented and editable source code in the system’s Boundary Scan programming language CASLAN. Single logic components as well as more complex logic clusters are covered. The tools are based on a synthetic fault simulation, and hence a deterministic fault coverage with safe and non-conflict test vectors is generated. Definitions and allocations on net and pin level, specified by the user, are automatically involved. If logic clusters are located in the peripheral area with external I/O, the test vectors are also generated for these pins and can be handled by means of the HYSCAN™ methodology. The combination of all tools within SYSTEM CASCON™ results in an even higher performance of other ATPG, e.g. during an interconnection test. For example, if the control signals of involved buffers are controlled by more complex logic clusters, such configurations are also automatically handled. If required, the source code can be executed stepwise via the integrated Multi Mode Debugger, and changes can be conducted and carried out immediately. Now it is possible to visualise all registers, TAP modes, logic levels on nets and pins for all 1149.x components, giving the user valuable support during fault analysis. Compiled test programs are cross-compatible with all Boundary Scan controllers from GÖPEL electronic. Subsequent to the test execution an automatic fault diagnostic on pin level in terms of a pin lexicon is executed. All faults which can be simulated incl. opens, 0/1 and shorts are detected as Boundary Scan nets and summarised in a fault report. Additionally, it is also possible to visualise faults in the integrated SCANVISION Layout Viewer. The new IEEE1149.1 tools are integrated into SYSTEM CASCON™ from version 4.3 onwards, and are activated per license manager. The new release is already shipping and is valid for users with valid software maintenance contract, incl. libraries with extendable component models for logic components. GÖPEL electronic, founded in 1991 and headquartered in Jena/Germany, is a worldwide leading vendor of innovative JTAG/Boundary Scan / IEEE 1149.x components and systems, providing mature software tools, high-performance controllers and accessories, as well as comprehensive product support and value added services. The company, with an annual turnover of more than 16 million Euro (about US$ 20Mil) in 2006, employs 125 people and maintains offices in Germany, the United States, The United Kingdom, and France. An extended distribution and service network of more than 300 specialists ensures excellent on-site and local customer support throughout the world. Additional information can be found at www.goepel.com |
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Göschwitzer Str. 58/60 07745 Jena/ GERMANY Contact: Stefan Meissner Tel: +49-36 41 68 96-39 Fax: +49-36 41 68 96-44 Email: s.meissner@goepel.com Internet: http://www.goepel.com |