Functional test

Test development for functional test applications is usually a manual and time consuming process. Diagnostic capabilities of functional tests are rather limited and test execution time can be long, depending on UUT complexity and depending on how much effort is put into the test development. Also, functional test equipment can be very expensive.
On the other hand, practically all manufacturers want to verify whether the product functions per specification prior to shipping it to the customer. So, functional test is a necessity. The question is, how one can simplify functional test development, perhaps even automate it to a certain extend, while being able to predict the test coverage and also to improve on the diagnostics achievable by functional tests.

JTAG / boundary scan can help

Combining ad-hoc functional test with boundary scan has the advantage, that functional test sequences become much simpler, since they don’t need to detect and locate/diagnose structural faults. Boundary-scan tests can be run at the beginning of the test sequence, verifying that there are no structural defects (opens, shorts on the unit under test (UUT) in the circuitry testable through boundary-scan resources. After successful execution of such boundary-scan tests, functional tests can be run to exercise the UUT at speed. Furthermore, JTAG / boundary scan can be used to reconfigure certain parts of the circuitry, e.g. to aid functional test or to load firmware. At the most integrated level, both boundary-scan resources and functional test resources can be used in conjunction to improve testability and simplify test sequences.

JTAG / boundary scan, as defined in IEEE Std 1149.1, does not provide for at-speed testing. However, the TAP defined in this standard can be used to access internal test structures. Such internal test structures could be used to stimulate and/or observe parts of the circuitry implemented in an IC or they may even provide access to circuitry outside that device. A test utilizing these internal test structures is called a Built-In Self Test (BIST). BIST can help to achieve some functional fault coverage with JTAG / boundary scan applications.

Every software package of GOEPEL Electronics' SYSTEM CASCON tool suite includes an extensive application programming interface (API), very useful for integrations of boundary scan and functional test, for example.

VarioTAP - processor controlled test

Processor controlled test based on VarioTAP technology utilizes on-chip emulation resources accessible in many micro-processors (μP), micro-controllers (μC), and digital signal processors (DSP) through an IEEE 1149.1 compatible JTAG Port (and in some cases through some other debug port). Acting as an intelligent test controller at the functional core of the UUT, accessed via its JTAG port, the μP/μC/DSP can generate dynamic test sequences that interact with other circuitry on the UUT. This allows the JTAG port defined in IEEE Std 1149.1 to become an interface for functional test applications.

Functional test hardware

GOEPEL Electronics also offers a wide variety of functional test hardware in various form factors.
Such modules include VarioCORE modules, which are part of GOEPEL Electronics' SCANFLEX hardware platform, for extended JTAG / boundary scan tests, as well as I/O and simulation hardware modules, such as those used for automotive test applications.