Embedded Board Test
As the name suggests, Embedded Board Test techniques rely on design-embedded resources to detect and diagnose manufacturing defects. JTAG / Boundary Scan is the most widely known test technique using device-embbeded resources (defined in IEEE Std 1149.1 and its offsprings, such as IEEE 1149.6 and others).
But a typical printed circuit board assembly offers many more embedded test resources one might not recognize as such initially. For example, many processors provide access to their register map through a debug port, which enables the control of processor-embedded features and board-level circuitry via access through that debug port. PCBAs containing FPGA can be tested by configuring that FPGA with test specific resources, effectively turning it temporarily into an embedded test controller. Custom ASICs may contain a number of additional test resources that might be accessible via the JTAG test access port (TAP) or through an embedded instrument access network following IEEE 1149.1 or IEEE 1687 specifications.
Utilizing all the embedded resources a PCBA can offer makes for a very powerful test strategy that can be taken advantage of throughout the entire product life cycle. Visit our Embedded JTAG Solutions (EJS) pages to find a comprehensive classification of applications utilizing design-embedded resources and contact us for more information or to schedule a design review.
Embedded Programming
In-system programming (ISP) refers to the task of programming components after they are mounted on a printed circuit board assembly (PCBA), and possibly installed in a larger system assembly.
Target devices can be programmed in a variety of ways, and the chosen approach often has an impact of the programming performance. Since programming components in-system most frequently rely on design-embedded resources, we group the various techniques under the term "Embedded Programming". For example, serial EEPROM devices typically are attached to processors or FPGA devices, components that more often than not implement JTAG / Boundary-Scan capabilities. This means that the target device (the serial EEPROM) can be programmed by toggeling its programming interface (typically SPI or I2C) with Boundary-Scan access from the processor or FPGA connected to it. This approach results in a notoriously slow programming time, however. The programming performance can be improved dramatically by utilizing embedded resources provided by the processor or FPGA, respectively.
To learn more about the various ways to program components in-system, get in touch with our Applications team or follow this link.
Processor-assisted test
Processor-assisted test and programming takes advantage of processor-embedded resources that can be accessed through a debug port. That debug port may be a JTAG TAP as defined in IEEE 1149.1, or it may be some other debug interface. Once access can be gained to those embedded resources, they can be utilized for board- and system-level test and programming applications. Such applications run at a much higher speed than what can be accomplished with boundary-scan access, allowing the detection of defects that might be missed with boundary-scan test alone.
Contact us or visit our pages discussing our VarioTAP technology to learn more about how processor-assisted test can enhance your test strategy.
FPGA-assisted test
As the name implies, FPGA-assisted tests utilize instrumentation that has been temporarily loaded into the FPGA, turning it into an embedded test controller on the unit under test (UUT).
FPGAs typically have access to major parts of the digital and possibly mixed-signal circuitry on the board and therefor can be utilized to exercise such circuitry to support a wide variety of application, including voltage measurements, frequency measurements, arbitrary wave-form generation, at-speed memory test, bit-error rate test, functional interface and protiocol tests, and even stress testing. Taking advantage of the configurability of FPGAs for board test can significantly enhance the fault coverage that would be achievable with boundary scan alone.
To learn more about our FPGA-assisted test technology, visit our ChipVORX pages and get in touch with us.